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Industry Analysis · 7 min read · Published June 6, 2022

Semiconductor EDA: How Focusing on User Experience Opened Up a New Market

Matt Genovese
Matt Genovese
Founder, Planorama Design
Semiconductor chips representing the EDA industry

I began my engineering career in semiconductors in 1997, in 0.42 micron (420 nm) technology. Everything about designing and taping out a chip was complex, time consuming, and expensive. As chip performance metrics have improved exponentially in almost every category since then, the tooling used to design a chip itself has also improved a great deal, though it remains complex and expensive.

Commercial EDA and the expertise gap

Electronic Design Automation (EDA) is a class of enterprise software used by engineers to design the chips that find themselves in cars, phones, computers, and just about everything else. Commercial EDA tools purchased by major semiconductor companies are feature-rich, highly configurable, underpinned by Ph.D.-level research, and designed by hardware engineers, for hardware engineers. However, from a user experience (UX) point of view, using EDA software has always been highly complex. Each engineer required days or weeks of training.

On top of the software's own complexity, managing automation of EDA-related tasks is custom-scripted by each semiconductor company. Nothing about traditional EDA has been turnkey from the viewpoint of the user experience and knowledge requirements. Consider the number of specialized engineers required, their EDA tools training, the EDA software itself, and the hard costs of IT infrastructure. Only companies with a large scale business case and significant funding can afford to innovate.

Chip design takes a big leap

Fast forward to 2022 where semiconductor production technology has leaped 100 fold to 0.005 micron (5 nm). In addition, design technology has changed. Non-commercial, community-supported tooling, frameworks, and libraries in commercial software development is a proven sustainable model. Now in chip hardware design, we see growing momentum to embrace open EDA tooling that is moving beyond the realm of hobbyists and viable as an alternative to commercial EDA.

One key project has specifically addressed the user experience of chip design: the OpenROAD project, which "attacks the barriers of Cost, Expertise and Uncertainty (i.e., Risk) that block the feasibility of hardware design in advanced technologies." OpenROAD uniquely addresses chip design UX by minimizing the need for human interaction altogether. Their objective is to completely automate the process, going from the functional description of the chip (called RTL), and producing the taped-out physical design files (called GDS).

UX as a competitive edge for chip suppliers

For the time being, most established semiconductor companies will continue to use commercial EDA solutions. OpenROAD's objective is not to unseat traditional EDA. Instead, by transforming the user experience of the chip design process, they will address and open an entirely new, underserved market. By making the usability tradeoff, the expertise gap is reduced, and with that the operating, infrastructure, and design costs as well.

Tying it together

The lesson can apply to the semiconductor industry as a whole. Semiconductor companies sell more than chips; they deliver complete solutions that include software to support their hardware products. Leading edge UX design principles have been a mainstay for successful software companies with truly differentiated products. Likewise, adoption of best-in-class UX design can establish a competitive advantage for semiconductor companies by accelerating customers' time-to-ramp to production and creating a frictionless experience.

Matt Genovese
Matt Genovese
Founder, Planorama Design

Matt Genovese is the founder of Planorama Design, a product acceleration firm helping enterprise software and AI teams ship better products faster. With a background spanning hardware verification, UX design, and AI integration, Matt brings a cross-disciplinary perspective to complex product challenges.

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